simdpp::zip16_lo, zip8_lo, zip4_lo, zip2_lo

 

libsimdpp

Types

Capabilities

Operations

Conversions

Bitwise operations

Floating-point operations

Integer operations

Memory access operations

Shuffle operations

Miscellaneous operations

 

Shuffling operations

blend splat combine split	permute2 permute4 shuffle2x2 shuffle4x2	transpose2 transpose4
Shuffles operating on 128-bit blocks
align16 align8 align4 align2
move16_l move8_l move4_l move2_l
splat16 splat8 splat4 splat2
move16_r move8_r move4_r move2_r
zip16_hi zip8_hi zip4_hi zip2_hi
zip16_lo zip8_lo zip4_lo zip2_lo
unzip16_hi unzip8_hi unzip4_hi unzip2_hi
unzip16_lo unzip8_lo unzip4_lo unzip2_lo
make_shuffle_bytes16_mask
shuffle_bytes16 shuffle_zbytes16	permute_bytes16 permute_zbytes16

 

template<unsigned N, class V1, class V2> Ret<N, _DETAIL_> zip16_lo( const any_vec8<N,V1>& a,                            const any_vec8<N,V2>& b );
template<unsigned N, class V1, class V2> Ret<N, _DETAIL_> zip8_lo( const any_vec16<N,V1>& a,                           const any_vec16<N,V2>& b );
template<unsigned N, class V1, class V2> Ret<N, _DETAIL_> zip4_lo( const any_vec32<N,V1>& a,                           const any_vec32<N,V2>& b );
template<unsigned N, class V1, class V2> Ret<N, _DETAIL_> zip2_lo( const any_vec64<N,V1>& a,                           const any_vec64<N,V2>& b );

Interleaves elements from the lower halves of two source vectors. Each 128-bit lane within vectors is processed separately.

The return vector type is governed by the expression promotion rules.

Parameters

a, b

-

source vectors

Return value

A vector expression.

Equivalent operation

For the uint32x4 case:

r = [ a0 b0 a1 b1 ]

For the uint32x8 case:

r = [ a0 b0 a1 b1 a4 b4 a5 b5 ]