libsimdpp  0.9.3
simdpp::Arch Class Reference

Identifies supported instruction set. More...

Public Member Functions

 Arch ()
 
 Arch (T val)
 
 operator T () const
 

Static Public Attributes

static const T NONE_NULL = 0
 Indicates that no SIMD instructions are supported. More...
 
static const T X86_SSE2 = 1 << 1
 Indicates x86 SSE2 support. More...
 
static const T X86_SSE3 = 1 << 2
 Indicates x86 SSE3 support. More...
 
static const T X86_SSSE3 = 1 << 3
 Indicates x86 SSSE3 support. More...
 
static const T X86_SSE4_1 = 1 << 4
 Indicates x86 SSE4.1 support. More...
 
static const T X86_AVX = 1 << 5
 Indicates x86 AVX support. More...
 
static const T X86_AVX2 = 1 << 6
 Indicates x86 AVX2 support. More...
 
static const T X86_FMA3 = 1 << 7
 Indicates x86 FMA3 (Intel) support. More...
 
static const T X86_FMA4 = 1 << 8
 Indicates x86 FMA4 (AMD) support. More...
 
static const T X86_XOP = 1 << 9
 Indicates x86 XOP (AMD) support. More...
 
static const T ARM_NEON = 1 << 0
 Indicates ARM NEON support (SP and DP floating-point math is executed on VFP) More...
 
static const T ARM_NEON_FLT_SP = 1 << 1
 Indicates ARM NEON support (SP floating-point math is executed on NEON, DP floating-point math is executed on VFP) More...
 
static const T POWER_ALTIVEC = 1 << 0
 Indicates POWER ALTIVEC support. More...
 

Detailed Description

Identifies supported instruction set.

This type is a bitmask type

Note: the exact values may change release to release.

Constructor & Destructor Documentation

simdpp::Arch::Arch ( )
inline
simdpp::Arch::Arch ( val)
inline

Member Function Documentation

simdpp::Arch::operator T ( ) const
inline

Member Data Documentation

const T simdpp::Arch::ARM_NEON = 1 << 0
static

Indicates ARM NEON support (SP and DP floating-point math is executed on VFP)

const T simdpp::Arch::ARM_NEON_FLT_SP = 1 << 1
static

Indicates ARM NEON support (SP floating-point math is executed on NEON, DP floating-point math is executed on VFP)

const T simdpp::Arch::NONE_NULL = 0
static

Indicates that no SIMD instructions are supported.

const T simdpp::Arch::POWER_ALTIVEC = 1 << 0
static

Indicates POWER ALTIVEC support.

const T simdpp::Arch::X86_AVX = 1 << 5
static

Indicates x86 AVX support.

const T simdpp::Arch::X86_AVX2 = 1 << 6
static

Indicates x86 AVX2 support.

const T simdpp::Arch::X86_FMA3 = 1 << 7
static

Indicates x86 FMA3 (Intel) support.

const T simdpp::Arch::X86_FMA4 = 1 << 8
static

Indicates x86 FMA4 (AMD) support.

const T simdpp::Arch::X86_SSE2 = 1 << 1
static

Indicates x86 SSE2 support.

const T simdpp::Arch::X86_SSE3 = 1 << 2
static

Indicates x86 SSE3 support.

const T simdpp::Arch::X86_SSE4_1 = 1 << 4
static

Indicates x86 SSE4.1 support.

const T simdpp::Arch::X86_SSSE3 = 1 << 3
static

Indicates x86 SSSE3 support.

const T simdpp::Arch::X86_XOP = 1 << 9
static

Indicates x86 XOP (AMD) support.


The documentation for this class was generated from the following file: