SIMDPP_HAS_FLOAT32_SIMD

#define SIMDPP_HAS_FLOAT32_SIMD /* 1 if present, 0 otherwise */

Indicates support of 32-bit floating-point elements in the SIMD unit. The library provides API for 32-bit floats even if this macro is defined to 0 and uses scalar implementation in that case.

Currently, the macro is defined to 1 on the following instruction sets:

SIMDPP_USE_SSE2
SIMDPP_USE_NEON_FLT_SP
SIMDPP_USE_NEON && SIMDPP_64_BITS
SIMDPP_USE_ALTIVEC
SIMDPP_USE_MSA

Types
Capabilities
Operations
Conversions
Bitwise operations
Floating-point operations
Integer operations
Memory access operations
Shuffle operations
Miscellaneous operations

Types
SIMDPP_HAS_INT8_SIMD
SIMDPP_HAS_INT16_SIMD
SIMDPP_HAS_INT32_SIMD
SIMDPP_HAS_INT64_SIMD
SIMDPP_HAS_FLOAT32_SIMD
SIMDPP_HAS_FLOAT64_SIMD
Conversions
SIMDPP_HAS_INT64_TO_FLOAT32_CONVERSION
SIMDPP_HAS_INT64_TO_FLOAT64_CONVERSION
SIMDPP_HAS_UINT64_TO_FLOAT32_CONVERSION
SIMDPP_HAS_UINT64_TO_FLOAT64_CONVERSION
SIMDPP_HAS_FLOAT32_TO_INT64_CONVERSION
SIMDPP_HAS_FLOAT32_TO_UINT64_CONVERSION
SIMDPP_HAS_FLOAT64_TO_UINT32_CONVERSION
SIMDPP_HAS_FLOAT64_TO_INT64_CONVERSION
SIMDPP_HAS_FLOAT64_TO_UINT64_CONVERSION
Integer vector shifts
SIMDPP_HAS_UINT8_SHIFT_R_BY_VECTOR
SIMDPP_HAS_INT8_SHIFT_R_BY_VECTOR
SIMDPP_HAS_UINT16_SHIFT_R_BY_VECTOR
SIMDPP_HAS_INT16_SHIFT_R_BY_VECTOR
SIMDPP_HAS_UINT32_SHIFT_R_BY_VECTOR
SIMDPP_HAS_INT32_SHIFT_R_BY_VECTOR
SIMDPP_HAS_UINT8_SHIFT_L_BY_VECTOR
SIMDPP_HAS_INT8_SHIFT_L_BY_VECTOR
SIMDPP_HAS_UINT16_SHIFT_L_BY_VECTOR
SIMDPP_HAS_INT16_SHIFT_L_BY_VECTOR
SIMDPP_HAS_UINT32_SHIFT_L_BY_VECTOR
SIMDPP_HAS_INT32_SHIFT_L_BY_VECTOR